This is a combined RAMP & BEE2 Workshop, held January 17-19, 2006 in 125 Cory Hall at UC Berkeley.
Attendance by invitation (academic researchers) only.
The RAMP/BEE2 workshop is a by-invitation only event for hands-on experience using Xilinx XUP boards and
the BEE2 system, with special emphasis on the use of these systems within the RAMP project. The workshop
will be held in 125 Cory Hall, UC Berkeley, Tuesday through Thursday, January 17-19, 2006. All day Tuesday
and Wednesday morning will be organized by Xilinx and will be an "Embedded Design with FPGAs Workshop".
Wednesday afternoon and all day Thursday will focus on the BEE2 system hardware and software architecture,
hands-on experience with a BEE2 system, and the RAMP design framework. We expect attendees to
participate in both parts of the workshop, as the BEE2 specific portion will follow directly from the Xilinx part.
for more information on the Xilinx portion of the workshop.