RAMP Bootcamp
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This material is based upon work supported by the National Science Foundation under Grant No. 0551739



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The RAMP Bootcamp is designed to familiarize the graduate students with the RAMP Design Framework and associated tools. In particular, we are aiming to use the RAMP Description Language (RDL) to build a system based on the Gaisler LEON-3 processor and IP library.

The bootcamp was in Austin, TX from March 21st through March 25th.

Through the planning and during the bootcamp we will wanted to accumulate our results in a single document which is also availible from the publications page. However time constraints turned this into a presentation instead.

Finally, we posted a few pictures of graduate students in action.

  • CMU:
    • Eric Chung (echung[at]ece.cmu.edu)
    • Eriko Nurvitadhi (enurvita[at]ece.cmu.edu)
  • Berkeley:
    • Greg Gibeling (gdgib[at]berkeley.edu)
    • Marghoob Mohiyuddin (marghoob[at]eecs.berkeley.edu)
    • Zhangxi Tan (xtan[at]cs.berkeley.edu)
  • MIT:
    • Asif Khan (aik[at]mit.edu)
    • Muralidaran Vijayaraghavan (vmurali[at]csail.mit.edu)
  • Stanford:
    • Njuguna Njoroge (njoroge[at]stanford.edu)
    • Shobana Padmanabhan (sp3[at]arl.wustl.edu)
    • Sewook Wee (weese[at]stanford.edu)
  • Texas:
    • Hari Angepat (angepat[at]ece.utexas.edu)
  • Washington:
    • Adrian Caulfield (adrianmc[at] cs.washington.edu)
    • Andrew Putnam (aputnam[at]cs.washington.edu)

Begin 10:00 AM on March 21st (Wednesday)
End at 12:00 PM on March 25th (Sunday)

  • Wednesday:RDLC Day
    • Greg's talk on RDL design, implementation
    • Run through RDL examples
    • Tool installation
  • Thursday:LEON-3 Day
    • Implement a LEON-3 system on XUP
    • Use and evaluate LEON-3 software and debugging tools
    • Design RDL wrappers for the LEON-3 core components
  • Friday:RDLize Leon Core, Day 1
    • AHB RAM or ROM
    • LEON-3 Core
    • Timer & Interrupt Controller
    • Memory controller
    • Debug Interface (Serial)
    • AMBA bus interface
  • Saturday:RDLize Leon Core, Day 2
    • Move to Native RDL
    • APB & Bridge
    • Serial port
    • GPIO
    • Ethernet
    • Debug the Design
  • Sunday:Wrap Up and Documentation
    • Our experiences
    • Short-term RDL Needs (Next 6 months)
    • Long-term RDL Needs (Next 9 months)
    • Evaluation of LEON3 and IP
    • How to use the system we developed
    • Future Work: What needs to be done

We will provide breakfast and lunch at the hotel each day, and then go out as a group (or a few small groups) for dinner. We will also go out for drinks afterwards a few nights, so plan on coming out to experience the best cuisine and atmosphere downtown Austin has to offer.

The bootcamp will be held at the Holiday Inn, Town Lake in downtown Austin.

You can check out pictures of the hotel and our conference room on Derek Chiou's picture page.

Bootcampers are expected to share a room with one other person. If you would like an individual room, please notify me as soon as possible.

You are expected to bring:
  • Laptop
  • Xilinx ISE 8.2 tools installed. (EDK 8.2 is optional)
  • ModelSim 6.2f or newer
  • Synplify Pro 8.8 or newer (optional)
  • Java 1.5 Runtime (Java 1.6 preferable)
  • XUP Board

Please download the most recent version of the RDL compiler and the RDL examples. Note that you may have to install the Java runtime environment to run RDLC.

If you do not have these items, please e-mail the list and we'll try to dig up some extras.