Aug 2006 Workshop
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This material is based upon work supported by the National Science Foundation under Grant No. 0551739

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Presentations
10:00-10:15 Introductions
10:15-11:00 RAMP Vision [PPT] & Infrastrcuture [PPT] Wawrzynek, Asanovic (UCB)
11:00-11:30 Mass Market Applications Driving MPSoC and Design Challenges [PDF] Uli Ramacher (Infineon)
11:30-12:00 High-level Description of Instructions Sets and Compiler Generation [PDF] Ulrich Rueckert (HNI, Paderborn University)
12:00-12:30 Virtual Prototype and Design Flow [PDF] Wolfgang Raabs (Infineon)
12:30-1:30 Lunch
12:00-12:30 Mapping task graphs to processors in large multiprocessor systems [PPT] Kurt Keutzer (UCB)
12:00-12:30 Hardware and Tools for Architecture Exploration Chen Chang (BEECube)
2:30-3:30 Free Discussion

RAMP - Aug 2006 Workshop
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Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the NSF.